All work
2026/ Technical writing · Architecture research/ ENGL 206 · team of four

ARM vs RISC-V for IoT

A 25-page feasibility report on whether IoT deployments should be built on ARM or RISC-V, backed by real benchmarking on QEMU and Spike rather than vendor claims, plus a total-cost-of-ownership analysis framed around deployment in Lebanon specifically. It lands on a blended recommendation, not a clean winner.

The numbers behind the recommendation

Real figures pulled from the report’s TCO model and the QEMU/Spike benchmark runs

ARM vs RISC-V · real numbers from visuals.py

At a glance

Format
~25-page feasibility report
Tooling
QEMU (ARM), Spike (RISC-V)
Team
4 authors
Course
ENGL 206 Technical English

Benchmarks over brochures

Methodology

Rather than comparing ARM and RISC-V on paper specs, the report runs both architectures under emulation, ARM workloads on QEMU, RISC-V workloads on Spike, and measures what actually comes out. That's paired with a total cost of ownership analysis covering licensing, toolchain maturity, and hardware availability specifically in the Lebanese market, where import costs and supplier access change the calculus that a generic global comparison would miss.

The conclusion is a blended recommendation rather than a single winner, because the two architectures actually trade off differently depending on the deployment scenario, and the report says so instead of forcing a cleaner-sounding answer than the data supports.

Companion to the CPU build

Where this connects

This report and the Dual-Issue RISC-V CPU project sit on the same architecture from two different angles, one extends a RISC-V core at the RTL level, the other evaluates RISC-V as a deployment choice against its main competitor. Read together they cover both how the ISA works and why you'd pick it.

Inside the repo

Structure

  • report.docxfull 25-page feasibility report
  • visuals/TCO, execution-time and market-forecast charts
  • visuals.pymatplotlib, generates all 6 report figures
  • Hadi_Visual1_TCB.pngmy chart, total cost breakdown
  • README.mdteam notes and file guide

Skills, in context

Where each one actually showed up

Computer architecture Comparative evaluation of ARM and RISC-V at the ISA and deployment level.
Benchmarking QEMU and Spike emulation runs producing the actual performance data behind the conclusions.
Cost analysis Total cost of ownership modelling adapted to the Lebanese market rather than generic figures.
Technical writing A 25-page report as a four-person team deliverable, arguing a nuanced conclusion rather than a simple winner.
Next project Dual-Issue RISC-V CPU